The present invention relates to the field of switching power converters. More particularly, the present invention relates to a method and apparatus for regulating the harmonics content of the current drawn from the power line boy electrical equipment and loads by utilizing Borderline Conduction Mode (BCD) of operation without sampling the input voltage. The present invention also relates to the electronic circuit design, physical construction and layout of such an apparatus.
Currently, there are several types of converters, which are widely used for DC-to-DC, DC-to-AC, AC-to-DC and AC-to-AC power conversion. In some applications, the purpose of the power conversion schemes is to shape the input current seen at the input of the converter, in order to correct the power factor. For example, in a power converter known in the art as an Active Power Factor Correction (APFC) converter, the role of the converter is to ensure that the AC current drawn from the power line is in phase with the line voltage, with minimal level of high-order harmonics. A typical and well-known implementation of an APFC converter is illustrated in FIG. 1. According to this implementation, the input voltage is rectified by diode bridge D1 and fed into a Boost converter that comprises an input inductor Lin, a switch S1, a high frequency rectifier (D2), an output filter capacitor (CO) and a load (RL). A power switch (S1) is driven by a high frequency control signal of duty cycle DON, so as to force the input current (iina) to follow the shape of the rectified input voltage (VivR), in which case the power converter becomes essentially a resistive load to the power line; i.e., the Power Factor (PF) will be a unity.
The need for APFC converters is driven by the worldwide concern for the quality of the power line supplies. Injection of high harmonics into the power line and poor Power Factor (PF) in general, is known to cause many problems. Among these problems are the lower efficiency of power transmission, possible interference to other units connected to the power line, and distortion of the line voltage shape. In the light of the practical importance of APFC converters, many countries have adopted, or are in the process of adopting, voluntary and mandatory standards. These standards set limits to the permissible current line harmonics injected by any given equipment that is powered by an alternating current (AC) electrical power source, so as to maintain a high power-quality. Another advantage of an APFC converter is the increase in the power level than can be drawn from a given power line. Without Power Factor Correction, the effective (i.e., rms) current will be higher than the magnitude of the first harmonics of the current, the latter being the only component that contributes real power to the load. Additionally, protection elements such as fuses and circuit breakers respond to the rms current. Consequently, the rms current limits the maximum power that can be drawn from the line. In Power Factor Correction equipment, the rms current equals the magnitude of the first harmonic of the current (since the higher harmonics are absent) and hence, the power drawn from the line essentially reaches its maximum theoretical value. It is thus evident that the need for APFC circuits is widespread and that economical realization of such circuits is of prime importance. Cost is of great concern, considering the fact that the APFC is an add-on expense to the functionality of the original equipment in which the APFC converter is included. In the light of the above, physical construction methods of APFC that are economical to produce, and can be easily integrated in any given equipment, are highly desirable and advantageous.
Common APFC converters usually operate in one of three modes (with respect to the current passing through the main inductor Lin):
(1) Continuous Conduction Mode (CCM), in which the inductor current never drops to zero;
(2) Discontinuous Conduction Mode (DCM), in which the inductor current drops to zero for a portion of every switching cycle; and
(3) Borderline Conduction Mode (BCM), in which the inductor current rises immediately after it drops to zero.
The shape of the inductor current in CCM is depicted in FIG. 2, that of DCM in FIG. 3 and the shape of the inductor current in BCM is depicted in FIG. 4. In these figures, TON is the time during which the power switch S1 (FIG. 1) is on, TOFF is the time during which the inductor (current) is in the discharge phase, TS is the switching period       (                            T          S                =                  1                      f            S                              ,                        f          S                =                  switching frequency                      )    ,
ILin is the inductor current, and Ipk is the peak inductor current.
The most efficient mode of operation is CCM, since the rms current of the power switch S1 is the lowest. However, reverse recovery of the main diode D2 poses extra losses and EMI generation. Furthermore, implementing an APFC converter in CCM mode requires that Lin is of high inductance value, making it bulky and costly. The DCM is the least desirable since the inductor rms current is the highest, which increases the power switch losses and makes the main inductor large in size, because the physical size of an inductor is proportional to the rms current that is expected to pass through it. A good compromise is, therefore, the BCM mode of operation. Implementing the BCM mode allows reduction of the inductor size, as well as the power switch losses. Furthermore, in a properly designed BCM converter, the voltage across the power switch will, by itself, drop to zero just after the inductor current reverses its direction due to the reverse current of the main diode. Turning the main power switch under zero voltage switching (ZVS) conditions reduces switching losses and hence increases the efficiency of the converter.
FIG. 5 represents a conventional realization of a BCM converter according to the prior art. The controller CONT receives the shape of the rectified power line voltage (Vacxe2x80x94ref) obtained via the voltage divider Ra, Rb from VivR, which is used as the reference for the desired shape of the input current. The controller receives the voltage Vse across Rse, which is identical to the input current when the power switch Q1 is conducting, and generates gate pulses DON to the power switch Q1, so as to force the inductor current to follow the reference voltage shape. The current level is adjusted for any given load RL by monitoring the output voltage Vod via the voltage divider R1, R2, and multiplying the reference signal Vacxe2x80x94ref by the deviation from the desired output voltage level, so as to adjust the effective reference signal to the load. BCM operation is achieved by turning on the power switch Q1 (i.e. Q1 conducts) only after the inductor current reaches a zero level. One way to detect this instance is by an auxiliary winding L2 that is coupled to the main inductor Lin. The auxiliary winding L2 produces a positive voltage Vtr whenever the inductor current reaches zero. The same L2 winding can also be used, together with D3, Rtr and Cb, to generate the auxiliary power supply +VCC required for the controller.
A major drawback of the prior art BCM converter is the need to sense the converter s input voltage, namely the line voltage after rectification. Due to the switching effects, the input voltage VivR is normally noisy and is susceptible to interference that may distort the reference signal and hence the controlled input current. Furthermore, the extra contact required for sensing the input current increases the number of pins of a modular device, if built according to conventional BCM schemes.
U.S. Pat. No. 5,742,151 discloses a PFC converter that provides unity PF by sensing only a current in the PFC circuit and a DC supply voltage. In the disclosed technique, the feature of sensing the input voltage is not used. However, conventional methods that do not sample the input voltage cannot operate in the BCM, but only in CCM and, with some inferior performance, in DCM. The reason for this is the fundamental difference between CCM, DCM and BCM. In CCM and DCM converters: the switching frequency is constant, whereas in BCM, the switching frequency has to adaptively change over the line voltage cycle. The reason for the need to change the switching frequency in BCM is that at the end of each TOFF the inductor current must reach zero. The period of each switching cycle is thus determined by the state of the converter (e.g., inductance of Lin and the average input current at any given cycle) and cannot be dictated by an independent oscillator. Consequently, APFC control schemnes that apply constant switching frequency cannot operate as BCM APFC controllers.
U.S. Pat. No. 6,034,513 also discloses a PFC controller that provides unity PF by sensing only a current in the PFC circuit and a DC supply voltage. However, this disclosure suffers from the same drawback as U.S. Pat. No. 5,742,151.
U.S. Pat. No. 5,047,912 discloses a modular four terminal solution to the realization of APFC converters. The control scheme applies a signal differentiator to generate a reference signal to the feedback loop. As it is known in the art, differentiators are extremely sensitive to noise that may corrupt the output signal. This is of particular concern in the environment of a switching circuit such as a Pulse Width Modulation (PWM) Boost converter, which is characterized by high frequency noise injection. Another drawback of the solution of said patent is that the reference feedback signal is derived from the line voltage. Since this signal normally includes noise, the derived reference signal may be highly corrupted by signals that distort the shape of the desired controlled line current.
According to conventional techniques, APFC converters can be built in either of the following ways:
1. As a subcircuit that is implemented as part of target equipment. In this case, the designer of the equipment applies passive and active components, as well as Integrated Circuit (IC) units to realize the front-end APFC converter. In FIG. 6, for example, a typical prior art subcircuit is included: the input rectifier D1, inductor Lin, power switch (such as a power MOSFET) Q1, a high frequency main diode D2, an output capacitor CO, an IC APF Controller with some auxiliary passive components, current sensing resistor RS and an output voltage divider R1 and R2. This physical embodiment has many disadvantages. High cost and low reliability are normally associated with a design that includes a large component count. Furthermore, as known in the art, the rather massive wiring required to realize the APFC converter makes it highly susceptible to Electro Magnetic Interference (EMI) and xe2x80x98groundxe2x80x99 noises. Consequently, this embodiment is highly undesirable, as it has many economic and engineering drawbacks;
2. Another possible embodiment of the APFC converter is to implement it as one block that includes all major components. In this case (see FIG. 7) the complete APFC converter is packaged as a single unit that includes all the required circuitry. This embodiment has the advantage of providing a solution to the problem mentioned in relation to FIG. 6. However, a problem of heat removal arises in this case. Additionally, being a separate unit that is normally obtained from a third party, the cost of such a solution is normally high. This is of special importance considering the fact that the APFC converter is an add-on to the equipmentxe2x80x94it is not required for its basic operation, but only to comply with line interface standards. Another disadvantage of this approach is the fact that it is compatible with IC technology and hence cannot benefit from the relatively low production cost of microelectronics. A further drawback of the one-block construction is the fact that all heat dissipating components, such as the main switch, diodes and inductor, are in close proximity to each other and hence the problem of heat removal could limit the ability of such a module to handle high power levels. Also, close proximity components that generate considerable EMI necessitates the inclusion of heavy shielding and filtering that increase complexity and cost and lower the efficiency.
There is thus a widely recognized need for APFC controllers that operate in DCM mode, but which do not require sensing the input voltage. It would be further highly desirable that the same circuit be able to operate both in BCM mode and, by employing slight hardware or software changes, in CCM mode. Moreover, it would be highly advantageous to have APFC controllers of modular construction that are also compatible with current microelectronics technologies.
All of the methods described above have not yet provided solutions to the problem of utilizing BCM-based APFC circuits without sampling the AC line voltage or the voltage at the APFC converter input.
It is an object of the present invention to provide a method for improving the Power Factor (PF) of an AC-to-DC power converter that utilizes a BCM-based Active Power Factor Correction (APFC) controller.
It is another object of the present invention to provide a method for regulating the harmonic content of the current drawn from the power line by electrical equipment without sampling the voltage of the power line or the voltage at the APFC converter input.
It is still another object of the present invention to provide an apparatus, of which efficient electronic design, physical construction and layout are meticulously adapted.
It is still further another object of the present invention to provide a method and apparatus for allowing changing a BCM-based APFC controller to CCM-based APFC controller by utilizing essentially the same circuit components.
Other objects and advantages of the invention will become apparent as the description proceeds.
The present invention is directed to a power factor correction apparatus, for a switching power supply fed by an arrays of rectifying diodes and consisting of at least an input inductor, a contact of which is connected in series with a contact of the array, and of a power switch connected between the other contact of the array and the other contact of the input inductor, that comprises:
a) circuitry for identifying, in each cycle determined by the switching frequency of the power supply, whenever the instantaneous value of the current through the inductor reaches a minimal value;
b) circuitry for switching the power switch to its conducting state in response to the minimal current through the inductor;
c) circuitry for reflecting the current flowing through the inductor by a measurable or simulated parameter; and
d) circuitry for providing indication, in each cycle, by using the parameter, the indication being related to the timing until the peak value of the current, that corresponds to a specific load, has been essentially reached, or to the time from the moment that the current reaches the minimal value until the timing, and for switching the power switch to its non-conducting state in response to the indication.
Preferably, the apparatus further comprises:
a) circuitry for sampling the output voltage;
b) circuitry for generating a signal which reflects the deviation of the output voltage from a predetermined voltage value; and
c) circuitry for modifying the value of one or more of the parameters in response to the signal, and for adjusting the timing at which the power switch is switched to its non-conducting state, thereby allowing the inductor current to reach a different peak value, for compensating the deviation, while keeping the portion, in each cycle, of the time period during which the power switch is in its non-conducting state.
The minimal value may be essentially zero, especially when the apparatus operates near border-line mode. The deviation in the output voltage may result from changes in the load or in the power line voltage.
Preferably, the circuitry for reflecting the current flowing through the inductor comprises:
a) a capacitor that is charged/discharged by a combination of a constant current source being inactive during the time periods when the power switch is in its conducting state and a dependent current source for discharging the capacitor with a current that is proportional to the input inductor current, such that the voltage over the capacitor inversely reflects the value of/changes in, the current flowing through the input inductor;
b) a first comparator, connected to the capacitor, for switching the power switch to its non-conducting state and for activating the constant current source whenever the voltage across the capacitor reaches a predetermined reference voltage; and
c) a second comparator that samples the current flowing through the input inductor, for switching the power switch to its conducting state and for disactivating the constant current source whenever the current flowing through the input inductor reaches an essentially zero value.
In one aspect, the apparatus may comprise:
a) a timing circuitry for continuously sampling the output voltage of the converter and the input current passing through the converter, and for generating a cyclic intermediate signal, having in each cycle a portion of positive slope and a portion of negative slope, the positive slope having a duration being equal to the time required for the input current to decline from its maximum value, during the cycle, to a zero value, and the negative slope having a duration being equal to the time it takes the intermediate signal to decline from its maximum value to a reference value;
b) a first controllable current source, for adjusting the rising rate of the positive slope portion of the intermediate signal;
c) a second controllable current source, coupled to the timing circuitry, for adjusting the rate of decline of the negative portion of the intermediate signal and the rising rate of the positive slope portion of the intermediate signal, the second controllable current source having a magnitude that is smaller than the magnitude of the first controllable current source;
d) a first controllable switch, coupled to the output of the controlled converter, for controlling the input current of the converter;
e) a second controllable switch for connecting or disconnecting the first current source, for causing the rise and decline portions of the intermediate signal; and
f) a drive circuit, coupled to the timing circuitry, for generating a switching signal from the intermediate signal for switching a first controllable switch for controlling the input current of the converter.
Preferably, the timing circuitry comprises:
a) a first means for comparing a voltage being a representative of the output voltage of the converter with a voltage reference;
b) a second means for sensing whenever the input current reaches a zero value; and
c) means for multiplying the output of the first means by a voltage being a representative of the input current, for adjusting the second controllable current source.
The driving circuit may comprise a flip-flop, coupled to the timing circuit, that generates switching signal from the intermediate signal, for switching the first controllable switch. The first controllable current source may be controlled by a voltage being a representative of the output voltage of the converter that is controlled. The second controllable current source may be controlled by a voltage being a representative of the output voltage of the converter being controlled. The timing circuitry may comprise a capacitor, coupled to the second switch, to the second controllable current source and to one input of an amplifier, the capacitor being charged whenever the second switch is closed and discharged whenever the second switch is open, the voltage of the capacitor being the intermediate signal and compared to a reference voltage coupled to a second input of the amplifier of which output is coupled to the flip-flop.
In accordance with another aspect, the timing circuitry may comprise:
a) an xe2x80x98Absolute-valuexe2x80x99 module (ABS), the input of which is coupled to the first and second current sources whenever the second switch is closed, and to the second current source whenever the second switch is open;
b) a Voltage-Controlled-Oscillator (VCO) module, coupled to the output of the ABS module, having an output clock signal of which frequency being dependent on the value of the magnitude of the current being delivered from the output of the ABS module to the input of the VCO module; and
c) an xe2x80x98up-downxe2x80x99 counter, coupled to the VCO module and to the flip-flop, the counter counts xe2x80x98upxe2x80x99 whenever the second switch is closed and xe2x80x98downxe2x80x99 whenever the second switch is open, the xe2x80x98upxe2x80x99 and xe2x80x98downxe2x80x99 counting rates are a function of the VCO frequency being a representative of the absolute value of the magnitude of the current passing through the input of the ABS module.
The timing circuitry may further comprise a first oscillator having a constant frequency, for allowing to initialize/excite the operation of the converter and/or to resume normal operation, the first oscillator being inoperative in normal operation of the converter and a second oscillator having a constant frequency, for allowing to operate the converter at constant frequency, the frequency being adjusted so as to maintain the input current of the converter above zero.
The first oscillator and the second oscillator may be the same oscillator, that further comprises means for programming and/or for configuring and/or for switching the oscillator. The first current source adjusts a rate of decline of the intermediate signal and the second current source adjusts a rate of rise of the intermediate signal, the second controllable current source being greater in magnitude in comparison with the first controllable current source. The zero value input current of the converter may be sensed by means of an analog comparator, by digital means or by a second inductor, being inductively coupled to the first inductor, the first inductor induces voltage on the second inductor.
Preferably, the control circuit comprises:
a) a first means for digitizing the output voltage of the converter;
b) a second means for digitizing the input current of the converter; and
c) means for processing the data gathered from the first and second digitizing means, for generating the switching signal for the first controllable switch.
The control circuit components may be contained in a module that comprises five external contacts or in an integrated circuit (IC). The input current sensing resistor and/or the output diode and/or the power switch may be contained in, or being external to, a module that comprises five external contacts and/or to an integrated circuit (IC).